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To deploy features commonly found in modern electronic products, such as high-fidelity audio, rich graphics, high-resolution displays, and wireless interfaces, designers must work with processors and FPGAs that use high-speed, high-bandwidth DDR memory.
But working with DDR interfaces poses unique design challenges. How do you know what component placement and routing are best or what constraints are needed to ensure your end products will work? This 15-minute on-demand PADS webinar explores the DDR memory interface and shows how an easy-to-use wizard can help you manage DDR issues during design.
To watch this webinar, click here.
Pete Starkey, I-Connect007
We continue with the rest of Pete Starkey’s report on Day 1 of the EIPC Winter Conference in Lyon, France. Included in this segment are presentations by Ventec, Ericsson, TTM and others, plus photos of their evening tour of Alstom.
Paul Taubman, Nine Dot Connects
In Part 1 of this series, Paul Taubman made the bold statement that the PCB layout is just as much a mechanical effort as it is an electrical one. In Part 2, he threads the needle, explaining why he believes that a PCB truly a mechatronic design, and why mechanical engineers may be more prepared to take on the PCB layout.
Real Time with DesignCon
Mahyar Vahabzadeh discusses a paper presented by his colleague Dr. Allen Horn at DesignCon. He also explains some of the different characteristics Rogers has discovered as they move from RF into high-speed digital materials.