Planning a PCB: Signal Integrity and Controlled Impedance Considerations


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Editor’s note: We are pleased to introduce our newest column, which will be contributed each month by a team member from Elmatica.

Knowledge and experience are the two key elements when planning a PCB. Today’s PCB designers must have far more knowledge and understanding of the PCB production process than in the past. This is especially important when they plan and how they plan the stackup, via span, routing and power distribution.

This article will focus on multilayer boards since these are the types of PCBs where we truly see the importance of planning in the day-today PCB life. On a double-sided board, you can of course use one layer as a ground plane, but critical traces are not easy to handle.

As a designer, you know your needs when it comes to signal integrity, electromagnetic interference (EMI) design and impedance requirements. The factors involved are:

  • Number of layers
  • Number of power and ground planes used
  • Sequence of layers
  • Space between the layers

To continue, we can say that:

  • Signal layers carrying critical signals,  should always be adjacent to a plane
  • Power and ground planes should be as close as possible for best capacitance
  • Power and ground planes can use other material with a higher Dk, for best possible capacitance
  • High-speed signals should be routed on innerlayers located between planes for  best possible shielding

Multiple groundings will lower the reference plane’s impedance, and reduce the common mode radiation from the high-speed signals. The lowest layer-count you need to achieve all of this is probably an 8-layer board (Figure 1).

However, these points can be very challenging. There might be a maximum thickness of the PCB that cannot be ignored; many plane layers will limit the number of signal layers. It can be difficult to get the wanted signal impedances, regarding distance between layers, track widths and gaps between tracks.

Signal integrity addresses the degradation of signal quality to the point where an error occurs. EMI focuses on the corresponding specifications, test requirements and interference between nearby equipment. For signal integrity, the key factor is to keep noise levels significantly below signal levels. Our noise margins are typical in the millivolt range for digital circuits, but for EMI, emission levels must be kept in the microvolt and microamp range.

Ground impedance is at the root of virtually all signal integrity and EMI problems. To keep a low ground impedance is mandatory for both EMI and signal integrity. This is achieved with a solid ground plane. In fact, the main problem with ground impedance is the discontinuities that occur in the signal path, and it has a major impact on characteristic impedance control.

Copper thickness is not an important factor. At high bit rates, the skin effect dominates so the signal is pushed to the copper surface, which means that additional copper thickness is irrelevant.

These days, with more and more HDI designs operating well up in the GHz frequencies, characteristic impedance control becomes more important, but also more challenging to maintain, since distances between layers are shrunk. HDI and microvias require less distance between layers, and the fact that more layers will be squeezed within a given PCB thickness.

To read the full version of this article which appeared in the October 2017 issue of The PCB Magazine, click here.

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