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The power distribution network (PDN) is the path from the power supply source (VRM) to the ICs (active devices). At low impedance, the PDN delivers adequate current to the receiver, enabling the PCB to function as desired.
Without a low-impedance path across the PDN, noise can propagate throughout a PCB, causing bit errors, voltage ripples, timing violations, and more. This white paper by Fadi Deek of Mentor, a Siemens Business, examines how impedance can be controlled in the PDN cavity.
To download this free white paper, click here.
Andy Shaughnessy, Design007 Magazine
I recently spoke with Heidi Barnes and Stephen Slater, both engineers with Keysight Technologies, about their presentations at this year’s virtual AltiumLive. They discussed ways to avoid signal and power integrity challenges later by following simple board design practices early on, how SI and PI are interconnected, and why the return path must be more than an afterthought in high-speed designs.
Zachariah Peterson, NWES
Of all the different boards a designer can create, a high voltage PCB design can be complicated and requires strict attention to safety. If not laid out correctly these boards can be safety hazards or can fail to function on first power up, leaving a designer with wasted time and effort. In the best case, the board will function reliably for a long period of time thanks to correct layout practices. High-voltage PCB design can be as complex as any high-speed digital design. Boards for high-voltage systems can be space constrained and they carry important safety requirements. They also need to be highly reliable to ensure they will have a long life when run at high voltage and current.
Dan Beeker, NXP Semiconductors
We are living in an age where the demands on electronic product designs are constantly evolving. The IC technology and operating speeds continue to pose significant challenges for teams as they work to develop their products. The increased transistor switching speeds and less forgiving compliance standards make signal integrity and electro-magnetic compliance more difficult to achieve. The status quo seems to have become, “We expect to fail EMC testing.”