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All material expands and contracts with temperature change, which is called the coefficient of thermal expansion (CTE). The CTE is expressed as parts per million change per degree Celsius, shown as (ppm/°C). Where and how the laminate expands effects the operation of the printed circuit in different ways. The X-Y expansion of the surface plane has serious consequences if your components are sensitive to the expansion of the PCB they are soldered to.
Components, such as large silicon-chip packages (LBGAs), can damage the solder joints as the PCB expands at a higher rate 18 ppm/°C while the large silicon chip, which expands at only 6 ppm/°C. The repeated mismatch in the expansion will create shear forces on the solder joint that will cause stress and micro-cracking over time. After a sufficient number of thermal test cycles (typically -65°C to +125°C), this will eventually lead to work hardening of the solder and cracking of the solder joint itself. The resulting intermittent device is unacceptable in high reliability in demanding thermal situations, such as military weapons systems or medical devices.
The temperate changes can also be exacerbated by extreme over temperature (i.e., exceeding the Tg temperature) over a number of heating cycles, such as too many soldering cycles in assembly. For example, the process might include one thermal over cycle to wave solder the PCB, a second over temperature cycle to solder the chips, and a third over thermal cycle to solder the large capacitors. The design of how to manufacture and assemble the PCB limiting over Tg cycles is very important in a number of future operating thermal cycles. Tests have shown three above Tg thermal assembly cycles is the equivalent to over 1,000 future thermal cycles to 80°C.
There are lower X-Y expansion laminates that can reduce the expansion of the PCB, as well as reduce the chance of solder joint cracking. The other method is to control the temperature and number of thermal high-low temperature cycles the PCB will be exposed to through improved choices in the cabinet and cooling methods.
One other area where the CTE can affect the reliability of your printed circuit assembly is in thermal stress cracking of the via copper plating with repeated thermal cycles. The expansion of materials is volumetric by temperature rise; however, the laminate construction is such that X-Y expansion and Z-axis are significantly different. The restraining glass fabric in the laminate prevents the resin from expanding isotropically (the same amount in all directions); therefore, the X-Y expansion will be significantly less than the Z-axis.
The resin volume expansion (glass does not expand by much) is controlled by the high Young’s modulus (strength of the expansion force) of the stronger glass laminated within the X-Y circuit layers. This simply means that the resin is restricted from moving in the X-Y axis by the lower expansion rate of the glass laminate, so it must expand in the Z-axis. Unfortunately, it means that the resin will expand significantly more in the unconstrained Z-axis and apply stress to the copper in the vias.
The Z-axis coefficient of thermal expansion increases sharply, as much as four to 14 times that of the X-Y axis when the temperature rises close to the Tg. In a typical PCB laminate, this means the Z-axis is expanding from 50 to 200 ppm/°C at the Tg, compared to 15 ppm/°C in the X-Y axis.
A typical multilayer PCB has a CTE of 16–18 ppm/°C. The lowest CTE for any resin/fiber system will almost always be that with the lowest resin concentration. It is possible to make laminates with CTEs that are very low. Be careful in the selection of laminate and prepregs that will not suffer from resin starvation. Starvation is the lack of resin to flow and fully fill the inner layer copper pattern gaps. Various laminate systems have been designed to control the Z-axes CTE; a few were successful, but many were not, and the ones that did work—such as Kevlar—are very expensive and hard to obtain.
However, there is an easier method to limit via cracking within high-reliability PCBs. The Z-axis resin expands without the restriction of the glass fibers. This expansion has enough force (Young’s modulus) that, with a large number of thermal cycles, the pressure exerted by the expanding resin will crack and rip the thin copper via plating apart and create a stress crack, leading to intermittent or an electrical open through the via. The Z-axis expansion increases more as you approach Tg to more than double what it was before—as much as 120 ppm/°C.
The copper in a plated through-hole has to have enough ductility, or it will crack during normal thermal cycling. Ductility is the ability of the copper to stretch and shrink with pressure. This is tested and strictly controlled within the copper plating bath. However, when plated into a PCB subject to large expansion forces at 120 ppm/°C, there is too little copper in the via to fully stretch with the large expansion in the Z-axis. After a few cycles, the copper will start to harden through stretching, and its ductility will begin to disappear. The result is cracked plated through holes and pad lifting.
However, there is a simple fix for this reliability problem—plate a bit more copper in the via. Through tests, we found that a copper via 0.059 inches long with a copper thickness of over 1.5 oz of plating is now mechanically strong enough to physically resist and stop the lower Young’s modules pressure of the expanding resin. By starting with thinner base copper (i.e., ¼ oz or less), the little bit of extra copper plated in the hole and surface tracks is not noticed. On thicker PCBs of 0.093 and above, even more copper is needed in the via to stop cracking if exposed to large thermal cycle temperatures.
The resulting slightly thicker copper in the vias has shown to pass over 3,000 thermal expansion cycles, greatly improving thermal cycling reliability.
Eran Navick is CEO of FineLine USA.