Reading time ( words)
This month I have a confession to make. I recently crossed over to "the dark side" and joined the iPod generation. Easy, I thought - no more CDs gathering dust in the autochanger.
However, such is not the case! The iron grip of the iPod interface in my car has destined all my iPod contents to be "CD6," with 100 tracks - except at track 99 the counter resets to 1. And it's not the same 1 as the first time around.
Still, perhaps it's best to delete all albums apart from The Chemical Brothers - perfect listening for the PCB fabrication fanatic - which links in neatly with this month's topic.
Do you remember a time when PCB material selection was simple? For run-of-the-mill applications you'd choose "vanilla-flavored" FR-4 and for high-speed applications, perhaps either a ceramic-loaded core or PTFE-based substrate. Whilst these two options still exist for absolute top-end performance, the market in the last few years has witnessed a stream of new "mid-market" core and prepreg materials which temptingly offer increased high-speed performance and more standard processing methods than more exotic materials.
There is a place for all the above materials in the market. But both the EE putting together the "platform specification" for the new design and the PCB fabricator responsible for its realisation are faced with a bewildering array of materials with a mix of choices: from ease of processing to reliability requirements and onwards to signal integrity capability. Over the next two months, The Pulse will focus on the signal integrity angle and describe how to use a field solver to make the best choices for material selection when trading cost versus signal integrity performance.
From an ultra high-speed digital perspective, what characteristics most affect signal integrity?High-speed serial communications on PCBs increasingly operate at a speed where signal loss is the predominant characteristic impacting on signal integrity and chipsets will have an acceptable "loss budget" which must not be exceeded if the circuit is to perform at maximum data rates. There are three primary drivers for losses:
1. Line length (only applicable at the design stage)2. Dielectric loss (can be reduced by appropriate material selection)3a. Copper loss (cross-section area - stackup design)3b. Copper loss due to surface roughness (can be reduced by material selection, and/or stackup)
You can use a lossy line field solver to get a very rapid "feel" for which of the above drivers is having most effect on your particular design.
We'll look at line length and dielectric losses this month and focus on copper losses in Part 2.
Modelling Line LengthTaking line length first, using a 2-D field solver simply model your chosen transmission line structure, along with the material characteristics from the laminate supplier datasheets. Specify the frequency band of interest and experiment with how long your transmission line can be before loss budgets are exceeded; you should find that line losses are directly proportional to line length. The field solver graphs in Figure 1 and Figure 2 show conductor and dielectric loss and total attenuation.
In these examples, the graphs show losses between 0 and 10GHz for a surface microstrip structure; the loss budget is set at -12dB. You can see from the graphs that in this case, line lengths up to around 14 inches keep you within the loss budget.
Figure 1. Losses for 14-inch line.Increasing the line length to, say, 17 inches takes you outside of the safety zone.
Figure 2. Losses for a 17-inch line.
So, to keep losses to a minimum, route critical high-speed traces to be as short as possible.
Modelling Dielectric LossSecond, by looking at dielectric loss, depending on your solver, you can add a single or multiple loss tangent figure for each layer of material in the stack; more advanced solvers can also accept a table of figures over frequency and interpolate them suitably.
The examples below compare a one inch trace on standard FR-4 with its typical value of tan delta of 0.022 with a higher-performance material, tan delta 0.009.
Figure 3. A one-inch trace on FR-4 with a tan delta of 0.022.
The superior performance at high frequencies of the more expensive material is clearly shown below in its much lower dielectric loss; note, though, that the conductor loss is similar for both materials.
Figure 4. A one-inch trace on higher-performance material with tan delta 0.009.
In Part 2 of this series, we'll take a look at copper losses.
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