DesignCon 2015 Names Best Paper Awards Winners


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DesignCon, the premier conference for chip, board and systems design engineers in the high-speed communications and semiconductor communities, today announced the winners of the Best Paper Awards from the blockbuster 2015 program. Recognizing outstanding contributions to the educational goals of the DesignCon program, the awards serve to acknowledge the authors as leading practitioners in semiconductor and electronic design. DesignCon's 20th anniversary event was held January 27-30 in Santa Clara, CA. To view the full list of winners, visit: ubm.io/DC15PaperWinners.

Papers were judged on merit as well as presentation quality during DesignCon 2015. All papers are reviewed for originality, relevance, impact and quality by the DesignCon Technical Program Committee, comprised of leading experts from all levels of the electronic design space – chip, board, package and system. Presentation quality is judged based on audience feedback collected at DesignCon. The awards were divided into four categories: Modeling & Simulation, High-Speed Signal Design, Power Integrity & Signal Integrity, and Test & Measurement.

….and the winners are:

Modeling & Simulation

Behavioral Modeling of Random Jitter with Realistic Time and Frequency Dependence

  • Scott Wedge, Sr. Staff Engineer, Synopsys, Inc.

Package Simulations For Mitigating Noise Coupling Onto Sensitive RF Signals

  • Dmitry Fliter, SI/PI & Packaging Engineer, CSR
  • Nir Malka, SI/PI & Packaging Dep. Manager, CSR

Practical Method for Modeling Conductor Surface Roughness Using Close Packing of Equal Spheres

  • Bert Simonovich, Signal Integrity and Backplane Design Consultant, Lamsim Enterprises Inc.

High-Speed Signal Design

Does Skew Really Degrade SERDES Performance?

  • Gustavo Blando, Senior Principal HW Engineer, Oracle
  • Shirin Farrahi, HW Engineer, Oracle
  • Vijay  Kunda, Senior HW Engineer, Oracle
  • Istvan Novak, Senior Principal HW Engineer, Oracle
  • Li Ying, Senior HW Engineer, Oracle
  • Xun Zhang, Principal Hardware Engineer, Oracle

A Simple and Innovative Circuit Technique To Tackle Power Supply Induced Jitter In High Speed Serial Links For 25Gbps

  • Dan Oh, Signal and Power Integrity (Si/Pi) Architect, Altera Corporation
  • Yujeong Shim, Member of Technical Staff, Altera Corporation

56+ Gb/s Serial Transmission using Duo-binary Signaling

  • Timothy De Keulenaer, Doctoral Researcher, INTEC-IMEC
  • Jan De Geest, Senior Staff R&D Signal Integrity Engineer, FCI
  • Guy Torfs, Senior Researcher, INTEC-IMEC
  • Johan Bauwelinck, Professor, Ghent University/iMinds
  • Yu Ban, Doctoral Researcher, INTEC-IMEC
  • Jeffrey Sinsky, Member of Technical Staff, Alcatel-Lucent
  • Bartek Kozicki, Member of Technical Staff, Alcatel-Lucent

Power Integrity & Signal Integrity

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