The Gerber Guide, Chapter 2


Reading time ( words)

It is clearly possible to fabricate PCBs from the fabrication data sets currently being used; it's being done innumerable times every day all over the globe. But is it being done in an efficient, reliable, automated and standardized manner? At this moment in time, the honest answer is no, because there is plenty of room for improvement in the way in which PCB fabrication data is currently transferred from design to fabrication.

This is not about the Gerber format, which is used for more than 90% of the world's PCB production. There are very rarely problems with Gerber files themselves; they allow images to be transferred without a hitch. In fact the Gerber format is part of the solution, given that it is the most reliable option in this field. The problems actually lie in which images are transferred, how the format is used and, more often, in how it is not used.

In this monthly series, I will explain in detail how to use the newly revised Gerber data format to communicate with your fabrication partners clearly and simply, using an unequivocal yet versatile language that enables you and them to get the very best out of your design data. Each month we’ll look at a different aspect of the design to fabrication data transfer process.

This column has been excerpted from the Guide to PCB Fabrication Data: Design to Fabrication Data Transfer.

Chapter 2: Alignment (Registration)

Never mirror or flip layers! All layers must be viewed from the top of the PCB, which means that the text must be readable on the top layer and mirrored on the bottom layer. Alas, sometimes, in a mistaken attempt to be helpful, designers flip layers because they must anyway be mirrored on the photoplotter. This could be helpful in a world where the designer's files are used directly in fabrication, but these data layers are actually input for the CAM system. This needs the correct 2.5D PC structure, so designers need to follow the standard protocol for providing digital data. The fabricator's CAM system will do the rest: it will optimise and panelise the PCB and on output of the final, panelised data, it will mirror, rotate, shift and scale as required by production. Any designer that mirrors layers can only hope that the CAM engineer notices this and ‘unmirrors’ them. 

To read this entire article, which appeared in the September 2015 issue of The PCB Design Magazine, click here.

Share


Suggested Items

3D Convergence of Multiboard PCB and IC Packaging Design

07/18/2018 | Bob Potock, Zuken
A new generation of 3D multiboard product-level design tools offer major improvements by managing multiboard placement in both 2D and 3D, and enabling co-design of the chip, package and board in a single environment. Multiboard design makes it possible to create and validate a design with any combination of system-on-chips (SOCs), packages, and PCBs as a complete system. Chip-package-board co-design enables designers to optimize routability via pin assignment and I/O placement to minimize layer counts between the package, chip and board. The new design methodology makes it possible to deliver more functional, higher performing and less expensive products to market in less time.

Dave Wiens Discusses Multi-board Design Techniques

07/09/2018 | Andy Shaughnessy, I-Connect007
For our multi-board design issue, I interviewed Dave Wiens, product marketing manager for Mentor, a Siemens business. We discussed how the multi-board design technique differs from laying out single boards, along with the planning, simulation and analysis processes required to design multi-board systems.

Paving the Way for 400Gb Ethernet and 5G

06/26/2018 | Chang Fei Yee, Keysight Technologies
This article briefly introduces the 4-level pulse amplitude modulation (PAM-4) and its application in 400 Gigabit Ethernet (400GbE), to support the booming data traffic volume in conjunction with the deployment of 5G mobile communications. Furthermore, this article also highlights the essential pre-layout effort from signal integrity perspective for physical (PHY) link design on a PCB, including material selection, transmission line design and channel simulation to support 56Gbps data rate that paves the way for seamless communication in 400GbE.



Copyright © 2018 I-Connect007. All rights reserved.