Beyond Design: Stackup Planning, Part 4


Reading time ( words)

In this final part of the Stackup Planning series, I will look at 10-plus layer counts. The methodology I have set out in previous columns can be used to construct higher layer-count boards. In general, these boards contain more planes and therefore the issues associated with split power planes can usually be avoided. Also, 10-plus layers require very thin dielectrics in order to reduce the total board thickness. This naturally provides tight coupling between adjacent signal and plane layers reducing crosstalk and electromagnetic emissions.

In high-speed digital designs, transient ground currents are the primary source of both unwanted noise voltages and radiated emissions. In order to minimize these emissions, the impedance of the ground should be minimized by reducing the inductive loop area. Inductance is directly proportional to the length of the conductor, so keep the loop area as short as possible.

To minimize inductance, two conductors (signal traces or ground planes) that carry current in the same direction should be separated. However, two conductors that carry current in the opposite direction (such as signal and ground planes or power and ground planes) should be positioned as closely as possible. Both these cases also help eliminate crosstalk.

Here are some additional rules for high-speed design:

  1. Use multiple ground planes, where possible, rather than power planes, in the stackup to isolate signal layers.
  2. Place stitching ground vias close to every signal transition (via) to provide a short current return path.
  3. Spread numerous ground stitching vias around the board to connect the multiple ground planes through a low impedance path.
  4. Don’t use ground pours on signal layers as this reduces the impedance of nearby traces. If you must, in order to balance copper, separate the signal and pour by 20 mils.

If power planes are used as reference planes, then the return current must transverse stitching capacitors in order to jump between ground and power planes. The current flowing through these stitching capacitors will create a voltage drop across them. These voltages may radiate adding to system noise problems. 

To read this entire column, which appeared in the October 2015 issue of The PCB Design Magazine, click here.

Share

Print


Suggested Items

Todd Westerhoff on the Value of Solid Design Skills

01/21/2020 | Andy Shaughnessy, Design007 Magazine
Andy Shaughnessy recently caught up with Todd Westerhoff, product marketing manager for Mentor’s HyperLynx signal integrity (SI) tools. Todd discusses some of the challenges that he and his customers are facing and why good design skills have more influence on a PCB than any software tool.

The World of PCBs: Anything But Boring

01/17/2020 | Andy Shaughnessy, Design007 Magazine
Andy Shaughnessy had the chance to catch up with Megan Teta, CID+, product manager of design and education services at Insulectro. Megan explains why she’s excited to become more involved in training and why the world of PCBs is anything but boring, contrary to popular opinion.

Top 10 Most-Read Design News Stories of 2019

12/26/2019 | Andy Shaughnessy, Design007
As we move into 2020, we took a look back at the most popular Design007 news stories of the past year. Here for your enjoyment are the Top 10 most-read Design007 news items of 2019.



Copyright © 2020 I-Connect007. All rights reserved.