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Optimizing large pin-count FPGAs is challenging. Manual optimization can take days and result in reduced quality.
This new video from Mentor Graphics shows how signal pin assignments can be automatically optimized between multiple FPGAs on the PCB while respecting pin-specific rules and constraints. Reduce the number of routing layers, minimize crossovers and overall trace lengths on the PCB, and reduce signal integrity issues for higher completion rates and shorter FPGA route times.
To watch this video, click here.
Successful signal integrity analysis depends on a fundamental concept: impedance. Without a thorough understanding of the impedance values that a signal encounters along the way, designers cannot maintain good signal quality from source to receiver.
Andy Shaughnessy and Pete Starkey, I-Connect007
I-Connect007 editors Andy Shaughnessy and Pete Starkey recently met with Polar Instruments Managing Director Martyn Gaudion at productronica. They discussed the success of "The Printed Circuit Designer’s Guide to…Secrets of High-Speed PCBs," the ongoing challenge of facilitating communication between designers and fabricators, and the influence of chemical bond-enhancement processes on insertion loss.
Andy Shaughnessy, PCB Design007
Insulectro and Isola recently shared a combined booth during PCB West 2017. Insulectro has distributed Isola materials for years, and the companies wanted to focus on Isola’s line-up of high-speed, low-loss material sets. Insulectro’s Chris Hunrath, VP of Technology, and Norm Berry, Director of Laminates and OEM Marketing, sat down with me to discuss the challenges facing signal integrity engineers today, and some of the Isola low-loss, low-Dk materials that can help with their signal integrity requirements. You might find Chris and Norm speaking to a group of PCB designers near you.