The Many Voices Over the Past Year


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In line with our "Voices of the Industry" theme this month, we're publishing this handy index of all of the interviews we've conducted over the past year with the movers and shakers, managers, entrepreneurs, and and rank-and-file designers and design engineers. In case you missed them, here's another bite of the apple, alphabetized by interviewee's last name.

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3D Convergence of Multiboard PCB and IC Packaging Design

07/18/2018 | Bob Potock, Zuken
A new generation of 3D multiboard product-level design tools offer major improvements by managing multiboard placement in both 2D and 3D, and enabling co-design of the chip, package and board in a single environment. Multiboard design makes it possible to create and validate a design with any combination of system-on-chips (SOCs), packages, and PCBs as a complete system. Chip-package-board co-design enables designers to optimize routability via pin assignment and I/O placement to minimize layer counts between the package, chip and board. The new design methodology makes it possible to deliver more functional, higher performing and less expensive products to market in less time.

Dave Wiens Discusses Multi-board Design Techniques

07/09/2018 | Andy Shaughnessy, I-Connect007
For our multi-board design issue, I interviewed Dave Wiens, product marketing manager for Mentor, a Siemens business. We discussed how the multi-board design technique differs from laying out single boards, along with the planning, simulation and analysis processes required to design multi-board systems.

Paving the Way for 400Gb Ethernet and 5G

06/26/2018 | Chang Fei Yee, Keysight Technologies
This article briefly introduces the 4-level pulse amplitude modulation (PAM-4) and its application in 400 Gigabit Ethernet (400GbE), to support the booming data traffic volume in conjunction with the deployment of 5G mobile communications. Furthermore, this article also highlights the essential pre-layout effort from signal integrity perspective for physical (PHY) link design on a PCB, including material selection, transmission line design and channel simulation to support 56Gbps data rate that paves the way for seamless communication in 400GbE.



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