Trouble in Your Tank: Flexible Metalization, Part II

In previous columns and elsewhere in literature, concerns about electroless copper peeling from polyimide material have been reported. meta1.jpgThe main concern with is the creation of a void caused by peeling or blistering (Figure 1).

It is hypothesized that the blisters originate from one of, or a combination of, the potential causes listed below:

  • Excessive catalyst adsorption causing a hyperdeposition of electroless copper
  • Highly stressed electroless copper deposit
  • Plasma residues causing poor bondability of electroless copper
  • Overactive resin surface due to plasma
  • Lack of surface profilometry due to plasma

Often, fabricators resort to double passing the circuits through the electroless copper process with the hope that the second pass will cover the void and prevent further blistering. Just remember, “Hope is not a strategy.”

It is recognized that plasma desmear leaves the surface in somewhat of an inert state. It is important that the fabricator work very closely with the plasma supplier to ensure an optimized process. It is also critical that residues from the plasma desmear process be removed prior to electroless copper plating. 

meta2.jpgAs is often the case, adhesive-based flexible circuit constructions present another challenge related to achieving void-free metalization. Due to the difficulty in plating flexible materials (particularly when plasma-treated only), one would think that alkaline permanganate treatment could be used to enhance the plating of a void-free deposit. Unfortunately, using a full permanganate cycle can have disastrous consequences (Figure 2).

The suggestion is if one has voiding issues with certain flexible or rigid-flex builds, use a modified permanganate cycle after plasma.

In this case, modified means to skip the solvent-sweller step (either NMP or butyl/caustic-based) and only immerse the parts in the permanganate solution, followed by the neutralization step.

Another critical success factor relates to the operational and chemical conditions within the electroless copper deposition process. These key aspects will now be presented in some detail. Much of what is detailed below are the results of many DOEs. These experiments yielded several important pieces of information.  

After several DOEs and other tests, the best condition for eliminating the peeling electroless is to implement what is known as a low deposition rate electroless copper process. The definition of low deposition is a process that deposits 1.0 to 1.5 µin of copper per minute of dwell time in the electroless copper solution. This is achieved by making several modifications to the current process. First, the electroless copper plating solution should be reduced in temperature to 80−90°F with a deposition time of 20 minutes. The target deposit thickness is 20−25 µin in 20 minutes. 

To further slow the deposition rate of the bath, the amount of palladium-based catalyst deposited on the dielectric materials must be reduced. This is accomplished by reducing the cleaner/conditioner as well as catalyst concentrations. Of course, it helps if the cleaner/conditioner chemistry is designed to reduce the thickness of the catalyst layer as it is adsorbed onto the polyimide material. Reducing the catalyst layer thickness, and in turn the amount of palladium on the material, improves adhesion and reduces the tendency of the electroless copper to blister from the substrate.

Polyimide Materials

It is a good idea to review the chemistry involved in polyimide flex materials. Polyimide materials are a condensation reaction of a dianhydride and a diamine compound in a dipolar aprotic solvent, such as DMF and DMAc. Poly(amic acid) is converted to the final polyimide product by thermal imidization. Figure 2 details the reaction showing the synthesis of polyimide. Polyimide has exceptional solvent resistance, high thermal stability, and good dielectric properties.

One of the critical aspects of plating is the ability to activate the substrate to be plated.

meta3.jpgAmides, such as polyimide, are one such material. Amides and imides are the least reactive of the carboxylic acid derivatives. However, they are attacked by strong base and acid (heat). Base hydrolysis of an amide is shown in Figure 3 using 1M KOH at 80°C for 20 minutes, followed by 0.2N HCl at RT for five minutes.

It is highly recommended that this type of procedure be implemented when attempting to metalize polyimide. This is referred to as a preconditioning step.

Successful metalization of flex and rigid-flex board structures is challenging. However, if one understands the limitations of the wet processes (never assume you can apply FR-4 processing here), a void-free continuous adherent copper deposit is achievable.

meta4.jpgA few additional caveats:

  • Not all electroless copper processes perform equally
  • Plasma leaves the surface in an inert state, which is not easy to obtain adhesion and coverage
  • Pay attention to the pre-plating parameters and tighten the operating window as needed
  • Flex and rigid-flex is “not your father’s FR-4” anymore

Michael Carano is VP of technology and business development for RBP Chemical Technology. To reach Carano, or read past columns, click here.

This article originally appeared in the July 2018 issue of PCB007 Magazine, click here.

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2018

Trouble in Your Tank: Flexible Metalization, Part II

08-16-2018

In previous columns and elsewhere in literature, concerns about electroless copper peeling from polyimide material have been reported. The main concern with is the creation of a void caused by peeling or blistering.

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Trouble in Your Tank: PTH Failure Mechanisms and Using IST as a Tool, Part 1

08-09-2018

This edition of “Trouble in Your Tank” will elucidate the difficulty of root cause defect analysis when incorrect assumptions (and thus conclusions) are made. Further, it will illustrate that when proper tools are used to study the issue, additional data is gathered that supports the actual cause of the defect.

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Trouble in Your Tank: Surface Preparation and Cleaning, Part 2

07-16-2018

Some type of cleaning and surface structuring is required in virtually every step of the printed circuit manufacturing process, from preparing the raw laminate for etch or plating resist to final assembly board cleaning before shipment. In this edition of “Trouble in Your Tank,” I will attempt to cover most of the general cleaning problems that can occur in any of these steps and, where possible, any problems unique to a specific manufacturing step.

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Trouble in Your Tank: Looking at PTH Voids

05-25-2018

Several columns have been published in this space describing the origins of voids in the plated through-hole. However, not all voiding is caused by or has its genesis in the electroless copper (PTH metalization) process.

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Trouble in Your Tank: Pits and Mouse Bites, Part 3

05-03-2018

In the first two columns in this series, the author presented two critical areas of the PCB fabrication process thought to contribute to the mouse bite and pitting defects seen in productionat a fabrication facility. In those first two parts, photoresist lamination and exposure parameters were investigated as to the possible root cause of the defects.

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Trouble in Your Tank: Surface Preparation and Cleaning, Part 1

04-17-2018

Surface preparation and cleaning are essential aspects of metal finishing and printed circuit board fabrication. The printed circuit board fabricator has several processes that fit the broad category of cleaning and surface preparation in its toolbox. It is critical that the engineer carefully evaluates these methods and processes to determine the most effective way to optimize yields.

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CASE STUDY: Pits and Mouse Bite Issues, Part 2

02-15-2018

In last month’s column, I introduced a case study that centered on plating pits and mouse bites. There were three areas in the process that raised concern as to the potential root cause of the defect. Of course, as with the case in all troubleshooting situations, it is best to look at the problem with wide open eyes. Just because one is looking at an issue that is visible after copper plating, this should not mean that is the only place to look. And this case study illustrates that point quite clearly.

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2017

Trouble in Your Tank: Moving into Microvias—The Interaction of Materials and Processes, Part 2

12-01-2017

Most of the dielectric materials that are used to make printed circuit boards incorporate reinforcement into the resin system. Reinforcement usually takes the form of woven glass fiber. Woven fiberglass is just like any other cloth, made up of individual filaments that are woven together on a loom.

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Trouble in Your Tank: The Critical Importance of Rinsing, Part 2

11-10-2017

In Part 1 of this series on the importance of rinsing, the author presented an overview of the critical aspects of rinsing as it applies to the overall quality of a printed circuit board, with considerable space devoted to water conservation. Thus, we now turn to how one can improve rinsing effectiveness without increasing water consumption and, by default, significant waste treatment costs.

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Trouble in Your Tank: Moving into Microvias—The Interaction of Materials and Processes, Part 1

08-23-2017

In the first part of a series of columns focused on microvias, the importance of adopting HDI technology as a strategic initiative for the PWB fabricator is presented. The major drivers for HDI are listed.

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Trouble in Your Tank: The Critical Importance of Rinsing, Part 1

07-14-2017

In nearly every chemical process step in the PCB industry, rinsing is an immediate and required process step. Rinsing is typically a crucial step following a chemical process, and is thought to be one that requires little or no attention to function properly. However, problems caused by ineffective rinsing are responsible for many rejects, as well as huge operating costs in the waste treatment department.

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Trouble in Your Tank: The Desmear Defect Guide

05-16-2017

Inadequate or excessive desmear will lead to several PTH defects and failures. Resin smear, ineffective texturing of the resin, and even overly aggressive desmear will contribute to poor plating, adhesion failures and a myriad of other non-conforming defects. However, proper troubleshooting protocol dictates that the engineer also looks at drilling as the contributor to these and other defects.

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Trouble in Your Tank: Copper-to-Copper Peeling

05-09-2017

Follow good shop practices in terms of surface preparation, electroless copper plating thickness and resist developing parameters. Optimal surface preparation utilizing cleaners and micro-etches is critical to eliminating copperto-copper peeling. In addition, over- and underdeveloping create their own set of process constraints. Pay very close attention to developer pH, operating temperature and break point

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Improving Solderability and Corrosion Resistance for Final Finishes, Part 1

03-16-2017

The process of forming a reliable solder joint between the component and the printed circuit board is paramount with respect to the manufacturing of robust circuit board assemblies.

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Trouble in Your Tank: Metalizing Difficult-to-Plate Substrates

02-23-2017

Metalizing materials such as polyimide used for flexible circuitry provides a significant challenge for process engineers. Conventional electroless copper systems often required pre-treatments with hazardous chemicals or have a small process window to achieve a uniform coverage without blistering.

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Trouble in Your Tank: Acid Copper Plating

02-23-2017

Electroplating a printed circuit board is by no means a trivial task. Higher layer counts, smaller-diameter vias (through-hole and blind) as well as higher-performance material sets contribute to the greater degree of difficulty with today’s technology.

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2016

Trouble in Your Tank: Via Formation and Mechanical Drilling, Part 2

12-27-2016

In this month’s installment of Trouble in Your Tank, I will further explore the critical drilling parameters required to drill a “good hole” and provide information on some little-known parameters required for this operation.

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Trouble in Your Tank: Via Formation and Drilling Mechanics, Part 1

11-28-2016

In the extensive process of printed circuit board fabrication, one of the steps involves mechanically drilling through-hole vias. Via formation is then followed by desmear and metallization. The quality of the through-hole drilling process (and by inference the quality of the drilled through-hole) or lack thereof will also impact the desmear and metalization processes.

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Case Study: Plating Nodules— Where Did These Come From?

11-02-2016

Introduction Sometimes the problems can really get pretty ugly. One would assume these uglies would be easy to correct. But most often, solving such a problem requires a much deeper dig into the process.

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Trouble in Your Tank: Case Study: Plating Nodules— Where Did These Come From?

10-13-2016

Sometimes the problems can really get pretty ugly. One would assume these uglies would be easy to correct. But most often, solving such a problem requires a much deeper dig into the process.

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Trouble in Your Tank: Building Reliability into the PCB, Part 2

08-17-2016

In Part 1 of this column on reliability, I presented the common PTH failures encountered when reliability is less than robust. PTH reliability is influenced by several factors including the quality of the PTH after drilling, plating thickness and plating distribution in the PTH. In this column, I will present additional factors, including the Coffin-Manson model in the context of understanding reliability failures.

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Building Reliability into the PCB, Part 1

07-20-2016

Sometimes there is confusion among PCB engineers and quality managers as to what constitutes reliability. Some may say that reliability refers to avoiding PTH failures such as corner cracks or interconnect defects. Then there are those who subscribe to a wider range of failure criteria to determine whether or not the final product is reliable for long-term service.

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Primary Imaging for Pattern Plating, Part 2—Development

06-14-2016

The proper development of the primary photoresist is critical to the overall success of the imaging process and in turn the processes that follow—either etching to form innerlayers or the electroplating processes on outer layers. In this step, the unexposed photoresist (after resist lamination and exposure) is washed away via the developing process.

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Trouble in Your Tank: Primary Imaging for Pattern Plating, Part 1

05-14-2016

It is the job of the PCB process engineer to ensure that a quality circuit is delivered. This process starts with sound mechanics of the im-aging system that include surface cleanliness and resist lamination parameters.

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2015

Copper Discoloration and Other Concerns with OSP

05-18-2015

Getting the OSP process to perform as it is intended requires attention to both the equipment operating parameters as well as chemistry. This month's "Trouble in Your Tank" delves into one of the most irritating issues with respect to OSP: discoloration (read "oxidation") on critical circuit features.

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More Pesky Solder Mask Problems: Plugged Via Leading to Skip Plating

04-21-2015

Many factors are in play when it comes to preventing ink from remaining in vias. In this article, Michael Carano presents two factors: solder not flowing in the vias and the lack of a plated solderable finish in the vias. This may be because some of the vias have a final finish in them and others do not--and all of these are happening on the same boards!

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Fine Lines and Spaces with Half-Etch Processes

03-24-2015

Half-etch technology is production proven in meeting high density circuitry requirements. Thinner copper is effective in achieving sub-35 micron lines and spaces due to the total copper thickness that must be etched.

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Getting to the Root Cause - Solderability Defect Analysis

01-06-2015

In this case study, a PCB fabricator investigates the root cause of solderability defects on ENIG-processed circuits. It was determined that the fabricator, due to process errors, caused hyper-corrosion within the nickel deposit, which led to the defects.

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2014

Lead-free Compatible OSPs: What Does This Really Mean?

12-23-2014

While next-generation OSP as a final finish has become the standard for lead-free compatible assembly, one should assume that any new OSP meets the criteria. A number of simple procedures may be followed to qualify any new OSP and ensure it is compatible with these higher assembly temperatures. Columnist Michael Carano takes a closer look.

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Oxide Alternatives to Enhance LPI Adhesion to Copper

12-02-2014

The aggressive nature of the ENIG process is a particular nuisance for some aqueous-based LPIs. Simply scrubbing the copper surface prior to soldermask application is often not an effective adhesion promotion mechanism for LPI and ENIG. Before exploring surface topography further, it is important to understand outside influences such as ENIG and its effect on adhesion.

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Trouble in Your Tank: Oxide Alternatives to Enhance LPI Adhesion to Copper

12-02-2014

The aggressive nature of the ENIG process is a particular nuisance for some aqueous-based LPIs. Simply scrubbing the copper surface prior to soldermask application is often not an effective adhesion promotion mechanism for LPI and ENIG. Before exploring surface topography further, it is important to understand outside influences such as ENIG and its effect on adhesion.

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Root Cause of Failures in PWB Lamination

11-11-2014

Understanding the interactions of the materials, oxide treatment, and the lamination process will help you get to the root cause failures in multilayer fabrication. When troubleshooting multilayer defects, it is necessary to understand the effect certain process parameters have on quality and reliability. Truly, the quality of a multilayer PCB (prior to desmear/metallization) will depend on several factors presented in this column.

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Trouble in Your Tank: Root Cause of Failures in PWB Lamination

11-11-2014

Understanding the interactions of the materials, oxide treatment, and the lamination process will help you get to the root cause failures in multilayer fabrication. When troubleshooting multilayer defects, it is necessary to understand the effect certain process parameters have on quality and reliability. Truly, the quality of a multilayer PCB (prior to desmear/metallization) will depend on several factors presented in this column.

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Controlling the ENIG Process for Optimum Efficiency and Performance

09-23-2014

Ideally, the ENIG process must provide the optimum in solder joint reliability while operating at the highest level of cost efficiency. All too often, process parameters that have the most influence on these critical attributes are poorly understood.

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Trouble in Your Tank: Controlling the ENIG Process for Optimum Efficiency and Performance

09-23-2014

Ideally, the ENIG process must provide the optimum in solder joint reliability while operating at the highest level of cost efficiency. All too often, process parameters that have the most influence on these critical attributes are poorly understood.

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Oxide Alternative Processes

09-11-2014

Columnist Michael Carano writes, "It is all about optimizing the performance of the oxide alternative chemistry. This includes close monitoring of the main reactive ingredients of the process chemistry. And one of the first issues that the industry had to address, whether one is using reduced oxide chemistry or oxide alternatives, is pink ring."

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The Degrees of Nickel Hyper-corrosion and Mitigation Strategies

08-12-2014

Columnist Michael Carano presents additional information about nickel hyper-corrosion, a spike or fissure in the nickel deposit evident after immersion gold plating, by further defining the five degrees of hyper-corrosion. He also explores the root causes of such attacks on the base nickel along with strategies to mitigate these effects.

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PTH Drilling Revisited - Fundamentals, Part 1

06-19-2014

The basic fundamentals of PTH drilling revolve around several key factors: 1) speeds and feeds--drill in-feed rate and spindle speed of the drill bit; 2) surface feet per minute; and 3) the material to be drilled. Understanding and applying these first few critical factors will influence the overall quality of the drilled, plated through-hole.

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2013

Achieving Fine Lines and Spaces, Part 1

12-10-2013

Circuit designs with three-mil lines and spaces are increasingly becoming the norm. Optimizing the imaging process should be of paramount concern. Over the next few months, Mike Carano will present the critical steps in the imaging process and provide insight as to where potential yield reducing defects can occur and how to prevent them.

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Trouble in Your Tank: Optimizing the Soldermask Process, Part 3

10-29-2013

In Part 1 and 2 of this series, Columnist Michael Carano presented critical information on ink properties, methods of soldermask application, tack drying, and more. In Part 3, the exposure process is detailed, including exposure units, UV lamps, the phototool, and overall exposure energy.

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Trouble in Your Tank: Electroless Copper and D-Sep

10-22-2013

In past columns, Michael Carano presented information about the different types of ICD interconnect defect and its root causes. One key defect that was not discussed is the infamous D-sep. What exactly is D-sep? Carano will explore this issue and provide suggestions for process improvement so you don't experience D-sep on your expensive, high-reliability PCBs.

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Trouble in Your Tank: PTH Voids: Getting to the Root Cause, Part 3

09-24-2013

Achieving a void-free deposit through the PTH line need not be an elusive goal. Instead, careful thought should be given to line design and the critical interactions of chemical parameters. In addition, the fabricator and supplier must work closely to ensure high-performance materials can be processed with the highest levels of reliability.

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Trouble in Your Tank: PTH Voids: Getting to the Root Cause, Part 2

08-26-2013

Both a reduced oxide process and an alternative oxide enhance the bond strength between the prepreg resin and the copper. In addition, the treated foil, if exposed by the wedge, is better able to stave off dissolution from the many acidic process steps to which the PWB will be subjected.

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Trouble in your Tank: Optimizing the Liquid Photoimageable Soldermask Process, Part 1

07-18-2013

The soldermask is an integral part of the circuit board. The proper application of soldermask requires strict attention to detail. This first article of a two-part series elucidates the critical operational requirements of the photoimageable soldermask process.

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Trouble in Your Tank: Those Problematic Soldermask Issues

06-13-2013

Michael Carano writes, "I'm sure you've heard the words, 'It's not rocket science.' Apologies to the rocket scientists, but sometimes PCB fabrication just makes it look that way. This column approaches soldermask adhesion using an actual case study."

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Trouble in Your Tank: Negative Etchback: Is it Really OK?

06-03-2013

Negative etchback is not a non-conforming defect according to IPC-600 (within limits). Acceptable levels of negative etchback do exist; however, there is a downside that can affect the overall plating quality in the PTH.

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Trouble in Your Tank: The Root Cause of ICDs, Part II

05-21-2013

This case study from Michael Carano emphasizes the critical thinking required to solve complex technical issues related to innerconnect defect. The defect described relates to drilling and inadequate drill smear removal, as opposed to plating as the root cause of the innerplane separation.

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Trouble in Your Tank: What Pushed the Tech Envelope in 2012 and a Look at 2013

01-18-2013

With increased growth rates for HDI, lesser known technologies are being adopted, including three critical solderable finish processes: Acid copper superfilling of blind vias, paste interconnect, and direct electroless palladium over copper.

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2012

Trouble in Your Tank: Pesky Peeling & Lifting Soldermask Issues

12-11-2012

Soldermask can peel or lift off areas on a PCB for a variety of reasons. This edition of "Trouble in Your Tank" presents the causes of soldermask peeling and lifting and stresses the importance of surface preparation prior to mask application.

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2011

Trouble in Your Tank: More ENIG Process Issues & Defects

09-22-2011

In previous columns related to the electroless nickel-immersion gold process, Michael Carano focused on plating and process defects related to mostly pre-plate process steps such as poor or inadequate cleaning, micro-etching and rinsing. This month, he tackles additional annoyances that lead to scrap and reduce the confidence in the ENIG process.

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