We know that in the signal integrity world, reflections are usually bad. In clock networks, reflection glitches may cause multiple and false clock triggering. In medium-speed digital signaling, reflections will reduce noise margin, and in high-speed serializer/deserializer (SerDes) signaling, reflections increase jitter and create vertical eye closure.
Editors Andy Shaughnessy and Nolan Johnson recently spoke with Lee Ritchey of Speeding Edge about the direction of PCB design. Lee also discusses some of the changes that he has seen in this industry over the past 40 years and some of the technological drivers that are causing designers to think more like electrical engineers than ever before.
In a world that is showing great strides toward implementing a Factory 4.0 world, why can’t a design be passed from a designer to the fabricator without errors every time? Dana Korf emphasizes moving the responsibility up in the...
We’re onto the second half of the year now, and we’ve seen lots of activities within our local Designers Council (DC) Chapters, including a few international chapters as well. Here's a snapshot of what has taken place so...
Meet Two New CID Grads: Kalen Brown and Michael SteffenTodd Westerhoff on the Value of Solid Design Skills
Bryan LaPointe: A Great Time to Be Working With TechnologyMatt Stevenson: An Exciting Time to Be in the IndustryChris Banton Is Bullish on New TechTamara Jovanovic Checks in After First Year as a DesignerThe World of PCBs: Anything But Boring, with Megan Teta
Curtis Scott Opens the Blinds on PCB Design