Global Impact on European PCB Fabrication: EIPC Summer Conference 2017, Day 1
Electronics industry professionals from 13 countries, mainly from Europe and Scandinavia, others from the USA, but some from as far away as India and Japan, gathered in Meriden, the centre of England, for the EIPC Summer Conference.
EIPC Chairman Alun Morgan welcomed all present, and acknowledged the support of trade and press sponsors before digging into his archive of industry history and reflecting upon the inaugural Printed Circuit World Convention, in London in June 1978, of which EIPC was a sponsor and a young Rex Rosario, with dark hair and a splendid moustache, was a member of the organising committee. Protégé of Dr Paul Eisler and founder of Graphic in 1968, rewarded for his services to the PCB industry with the Most Excellent Order of the British Empire in 2001, Rex had not missed a single World Convention and had for the last three years been Secretary General of the World Electronics Circuits Council. Past chairman of EIPC, Rex Rosario was delighted to be called forward to receive Honorary Fellowship of the Institute from his current counterpart.
After much applause and flashing of cameras, Rosario returned to his seat as the conference programme got under way with Walt Custer’s business outlook on the global electronics industry, with emphasis on Europe. Although some current market statistics would not be available until a few days after the conference, Custer gave the comprehensive analysis for which he has become legendary, against a background of geopolitical concerns and copper foil shortages. His leading indicators showed improving business conditions and a global resumption in demand, with expansion in most sectors of the world electronics supply chain. Although exchange rates affected growth calculations, and figures varied depending on what base currency was used, it was clear that the European industry had enjoyed a good first quarter and continued growth was forecast in end markets, particularly in the automotive and medical sectors.
Looking at the structure of the European PCB industry, with acknowledgement to Michael Gasch, an interesting analysis was that of Europe’s top 74 PCB fabricators by revenue, representing 1852 million Euros in 2015, half the revenue was shared by the top 20 in the proportions: 1-5: 26%, 6-10: 11%, 11-15: 8%, 16-20: 7%. Gasch had calculated that 2016 figures would be slightly less than those from 2015 and commented that the largest ongoing concern in the industry was the shortage of copper foil which would result in price increases and supply bottlenecks for laminates.
For once, Custer did not need to offer the “unpleasant truth or comforting lies” alternative, commenting, “The truth is pretty good right now!” Europe was strong and business conditions were improving globally. He forecast that the world PCB industry would grow by 2% in 2017 and by the same amount in 2018, although the geopolitical situation remained a major worry.
Recently returned from the Electronic Circuit World Convention in Korea, where he had received an award for Best Paper, Thomas Hofmann, president of Hofmann Leiterplatten in Germany gave a technical keynote presentation entitled “Sharing Experience in Embedding of Active and Passive Components in Organic PCBs for More Reliability and Miniaturization.”
Founded in 1989, the objective of Hofmann Leiterplatten had been to provide innovative fabrication support to electronic designers and development engineers in large OEMs and EMS companies. Amongst many successful developments, the technology of embedding active devices in PCBs was now being widely adopted and was attracting a great deal of attention, ironically from some who had dismissed the concept 20 years ago on the basis that “nobody needs it.” Thomas Hofmann described how embedding technology had evolved since the 1960s with thick film resistors, through the 1970s with proprietary buried-resistor materials laminated into PCBs, to the first examples of Hofmann Leiterplatten’s “Active Multilayer” (AML) in the 1990s. An essential requirement was to completely encapsulate the embedded device with resin, then the benefits of improved thermal properties, environmental and mechanical protection could be realised. Some early concerns had been expressed regarding possible damage to components during the multilayer pressing operation, but these had been demonstrated to be unfounded and a depth of knowledge had been established over many years’ experience of resin flow, press conditions and curing behaviour, together with in-house surface-mount assembly capability. He showed many application examples and a series of practical design guidelines.
Hofmann stressed the importance of cooperation between the PCB fabricator, the electrical designer, the PCB lay-out-engineer, the laminate manufacturer and the component supplier, as well as the assembly specialist and the test engineer, to achieve high first-pass yield. In effect, to achieve the full benefits of embedded device technology, it would be necessary to reconsider the structure of the total supply chain. But he made it clear that this should not be regarded as a disruptive technology, more an evolution of existing PCB fabrication techniques combined with new design, fabrication, assembly and testing methods.
The second technical keynote presentation came from Dr Despina Moschou from the University of Bath in the UK. Well-known for her work on Bio-MEMS and Lab-on-PCB microsystems, Dr Moschou described an inter-university collaborative CHIRP project supported by the British Council and the Scientific and Technological Research Council of Turkey to develop a child-friendly pre-diabetes diagnostic test patch for mass-population preventative screening. The prevalence of diabetes in Turkey was twice the global average, and with a rising incidence of childhood obesity there was a need for a painless, reliable, disposable device. Currently available solutions for diabetes screening were either low-cost but invasive, or non-invasive but high-cost. Lab-on-PCB technology offered a realistic non-invasive, disposable alternative. The proposed system used an array of hydrogel microneedle for the painless extraction of interstitial fluid and a sensing platform based on a flexible PCB. Sample transfer from the microneedles to the biosensor was via plasma-treated hydrophilic microfluidics. Inorganic alternative to enzymes were being investigated for improved reliability of glucose measurement, and a sensor based on copper oxide nanoparticles inkjet printed onto a gold electrode was showing favourable results.
“In the old days, frequency was not an issue” was EIPC Technical Director Michael Weinhold’s opening comment as he introduced the session on high frequency and power. The first presentation came from Martyn Gaudion, managing director at Polar Instruments in the UK, discussing the effects of copper roughness on insertion loss and how to account for it in field-solver modelling. Whereas a DC current was carried uniformly through the cross-sectional area of a conductor, at frequencies of 10MHz and above AC current flowed mainly along “skin” of the conductor. At frequencies around 10GHz, the effective skin depth was less than 1 micron, so the surface roughness of a copper conductor could have a dramatic effect on insertion loss. Electrodeposited copper foil was “treated” during its manufacture to give a favourable surface for bonding to laminating resin, and during multilayer PCB fabrication various chemical processes were used to prepare innerlayer copper surfaces prior to lamination.
So there would always be some degree of surface roughness to be considered when modelling insertion loss. But how to measure it and give it a quantitative value in a calculation to model insertion loss? “All models are wrong but some are useful!” was the often-used quotation attributed to statistician George E. P. Box, to be kept in mind as Gaudion reviewed traditional surface roughness estimates related to equivalent numbers and depths of scratches, but these were only valid for relatively low frequencies. “The higher the frequency and the longer the line, the higher the loss. Maybe not a big issue in a smartphone, but a big problem in a backplane.” Currently the best model was the one proposed by Huray, which considered the copper surface as a series of piles of snowballs to explain how incident electromagnetic waves were reflected and absorbed. It could be simplified by assuming all the balls were the same diameter. But it still remained to determine the best way to physically measure the micro-topography of the surface.
Approaching the impact of copper roughness from a more practical angle, Mutsuyuki Kawaguchi from MEC Company in Japan introduced a new bonding treatment which maintained a smooth surface. Traditional bonding chemistries depended on producing a more-or-less micro-roughened surface to improve the mechanical bond to the laminating resin. The process he described achieved the bond chemically by forming a copper-tin-nickel alloy layer 100-200 nanometres thick on the conductor surface followed by an anti-tarnish coating, and this combination then reacted with the resin during the multilayer pressing cycle to form a covalent bond. Even after 10 reflow cycles, peel strength remained slightly higher than that achieved with roughening treatments, for a range of high frequency laminates. And transmission loss at 50GHz was about 10dB/m less than that for other treatments. Kawaguchi explained the bonding mechanism by revealing that the anti-tarnish contained a silane coupling agent which reacted with hydroxyl groups at the alloy surface and cross-linked to the resin chemistry. A new copper foil with this chemical adhesion mechanism was under development and first samples would be available in Q4 2017.
IPC-4562 defines three classes of copper roughness: “standard,” “low profile” and “very low profile.” But the foil manufacturing industry has gone far beyond these definitions, with “ultra-low profile” and “almost no profile” copper foils becoming available. Thomas Devahif, from the R&D department of Circuit Foil in Luxembourg, described the development of these foils for use in very low loss material. Because the roughness of “very low profile” foil was around 3.0 microns, loss became significant at frequencies close to 1 GHz. It was necessary for roughness to be less than 1.25 microns to achieve acceptable results at frequencies above 20 GHz. This had now been achieved whilst maintaining good adhesion to low-loss resins. Devahif explained how the use of organic additives in the copper sulphate plating electrolyte had resulted in much smoother deposits. The drum-side surface quality of the foil had been further enhanced by an improved technique for polishing the titanium electrodeposition drum, and it was now possible to produce foils as thin as 6 microns. Zinc-chromate passivation gave excellent thermal and chemical resistance, and had less impact on insertion loss than other metallic passivation treatments. Mechanical measurement of surface roughness was not effective on ultra-low profile foil because on the limitations of probe tip geometry; 3D white light interferometry was a good non-contact technique. A new-generation no-profile foil was in development, with a silane-based adhesion promoter, and would be available at the end of 2017.
In addition to his duties as EIPC Chairman, Alun Morgan is a facilitator for the High Density Packaging User Group, and it was from this position that he reported the results of their in-depth investigation of the impact of new-generation chemical treatment systems on high-frequency signal integrity. The focus of the project was primarily on loss rather than adhesion. It set out to create a test vehicle for smooth copper that could be used in future projects to correlate copper roughness with signal integrity properties and to understand the differences between roughness measurement techniques, as well as evaluating the thermal shock results of the candidate adhesion promoters.
The test plan had been to assess six different innerlayer pre-lamination copper surface treatments using three different surface roughness measurement techniques, and to use two different techniques to measure insertion loss. Morgan described the design rules, layout and stack-up details of the six-layer test board. Copper surface roughness measurements were made by white light interferometer, 3-D laser scanning confocal microscope and white light vertical scanning interferometer, and signal integrity measurements by stripline and SPP techniques. It was observed that new chemical treatment systems offered some nominal improvement in signal integrity and allowed for a tighter performance band than was currently possible with the existing alternative oxide systems. Existing alternative oxide systems had the capability to provide some nominal signal integrity improvement through tight control of the micro-etch process, but significant effort was required to generate incremental improvement and to maintain day-to-day consistency.
Much discussion has been centred around the fundamental dielectric and loss properties of PCB materials, but how could these be meaningfully determined? Alexander Ippich, senior signal integrity engineer OEM Marketing at Isola Group, gave a presentation on practical aspects of the comparative testing of electrical performance of PCB base materials. If the wrong assumptions were made, comparing materials properties could be like comparing apples and oranges—although there might be some basic similarities, there were remarkable differences in detail.
He reviewed the available test methods for electrical performance, for Dk and Df testing on etched-off dielectric and for insertion loss testing on transmission lines, and commented on the pros and cons of alternative approaches. Testing of blank dielectric was quick and easy but the influence of copper was not included and the coupon was not representative of actual design, whereas although testing of transmission lines involved time-consuming design and fabrication of test vehicles, the influence of copper was included and the result bore much more relevance to a real design. The test method itself could introduce variables associated with cables, connectors and probes, and choices had to be made whether to test single or differential trace length, and whether to use a time domain reflectometer or a vector network analyser to make the measurements. PCB fabrication processes had considerable influence on results, and even small etching inaccuracies had a significant effect on loss values. Furthermore, if it was attempted to compare results on test vehicles that had been made by different PCB shops, the results could be skewed by process differences rather than actual differences in the properties of the materials. “It’s not like taking a ruler and measuring a piece of wood!”
Summing-up, Ippich made it clear that for data to be useful, the test method and conditions needed to be fully and exactly understood, and the test vehicle fit for use. When comparing materials, best results were obtained if the same test vehicle, the same PCB manufacturer using the same processes, and the same test method were used. The tests should ideally be carried out back-to-back and randomised, with more than one data point per material and a statistically significant sample size.
Marc Ladle, from Viking Test in the UK, ended the session with advice to PCB fabricators on keeping current with their equipment suppliers, commenting that, although their manufacturing equipment was generally expected to last at least 10 years, the technology of their products tended to change more quickly and process development to match product evolution was a driving force for new equipment purchase. In his experience, there was enormous variation in the way different companies addressed equipment purchase. Some had done their research, had a clear idea of what was available and who was the best company to supply it. Others would just order a machine and apparently only be interested in price and delivery. But in general, there was input from the customer and the material supplier with some recommendations from the equipment supplier. Ladle was keen that equipment suppliers and equipment buyers should work more closely together. And a good place to hold a meeting was next to the scrap bin! Suppliers could set up visits to see machinery in another factory, or to the equipment manufacturer, to assist the buyer in making an informed decision. The day an existing machine had critical failures and needed urgent replacement, was not the right time to start looking—it paid to have a good idea of what was available and who was best at making it.
The session on thermal management was moderated by Oldrich Simek, owner of Pragoboard in the Czech Republic, whose first presenter was Andrew Piotrowski from ICL Industrial Products in the Netherlands discussing a new phosphorus-based curing agent for printed circuit applications. He explained that ICL was a major supplier of both bromine-based and phosphorus-based flame retardants, and the trend was away from bromine and towards phosphorus. Most halogen-free flame retardants were derivatives of 9,10-dihydro-9-oxy-10-phosphaphenanthrene-10-oxide (DOPO).
He made it clear that flame retardants did not necessarily make materials non-flammable, but did enable them to comply with flammability tests like UL94-V0, and most flame retardants had a negative effect on the physical and electrical properties of the printed circuit board. The main challenge for flame retardants was finding materials that satisfied all the electrical, thermal, chemical, and mechanical properties required for optimal device performance. Phosphorus-based flame retardants were more efficient than bromine-based flame retardants based on the active element content, whereas the latter had excellent hydrolytic stability and low water uptake, which remained a challenge for many phosphorus based flame retardants. There was an increasing market demand for laminates with low Dk and very low Df, and such properties were difficult to achieve with reactive flame retardants. At a given frequency, the Dk and Df of a material depended mainly on dipole strength, the number of dipoles in one mole of the material, and dipole mobility, and to achieve low Dk and Df it was necessary to use polymers with low-polarisability bonds. Piotrowski explained that the goal had been to develop a molecule meeting the criteria of Dk less than 3.0 and Df less than 0.005 for the flame retardant itself, and the Dk and Df of the final product not being adversely affected by the curing chemistry, additional requirements were high chemical resistance, low moisture uptake, long storage life, good adhesion, low stress, high hardness, low shrinkage, high tensile modulus, low coefficient of thermal expansion and high thermal stability.
These objectives had been realised with a phosphorus-based aromatic polyester multifunctional curing agent known as E15-152T, which had a high reactivity with epoxy and cured at a similar rate to that of a classical phenolic but without the formation of unstable polar hydroxyl groups, resulting in enhanced thermal stability and very low Dk and Df. And it enabled a V0 flammability rating to be achieved with phosphorus levels less than 2.5% in unfilled epoxy systems.
Next to speak was Padraig McCabe, business development engineer with Schoeller-Electronics in Germany, with a presentation on thermal management solutions. Defining the thermal management problem in terms of heat flux, he explained that substrate materials were poor heat conductors, whereas copper had much higher thermal conductivity. Depending on the copper distribution, the heat flux in a circuit board was normally better in the x-y plane than in the z-axis and a power or ground layer had a big influence on the heat flux. Heat flux and direction were mainly influenced by the thermal conductivity of the materials and the temperature gradient in a given area. Tracks on or in a PCB made little contribution to heat conductivity because their cross-sectional area was too small. Many component packages were designed with a predetermined thermal pathway within the package, and the component footprint on the PCB generally incorporated a thermal pad with thermal vias to conduct heat away in the z-axis. But thermal via arrays had limited thermal conductivity and local copper coins offered an alternative with typically ten times the thermal conductivity for a given area.
McCabe showed comparative thermographs demonstrating that a copper coin could lower the device temperature by 10°C, resulting in a potential doubling of the component lifetime. He reviewed a range of thermal management options: pre-bonded or post-bonded heat planes, adhesive bonded coins, embedded coins and press-fit coins, with examples of appropriate applications for each, commenting that local copper coins could reduce weight and cost compared with conventional attached heat sinks and provide the opportunity of assembling components on both sides of the PCB, simplifying the assembly process and increasing first pass yield. The integration of local copper coins into PCB constructions was a well-established process, designs could be tailored for specific components and requirements, and PCB’s with integrated local copper coins had been demonstrated to be reliable and robust.
FR-4 laminates were familiar to all, but what was FR-15? EIPC board member Emma Hudson, from UL VS in the UK, gave the details. Driven by demands from the automotive, LED and high temperature power supply sectors for high performance epoxy materials, the Standards Technical Panel had reached consensus in January 2017 to add a new UL/ANSI grade to Tables7.2 and 7.3 of the 6th edition revision of UL746E. This was FR-15, the new higher temperature FR-4 type material for UL-recognised boards. In parallel with FR-4.0 and FR-4.1 designations, FR-15.0 was a brominated material and FR-15.1 was halogen-free. Other constituents and performance values were the same as for the equivalent FR-4 materials. The main differences were in temperature rating, where for thicknesses of 0.63mm or greater FR-15.0 and FR-15.1 required an electrical and mechanical relative thermal index of 150°C. The benefits were that no additional testing was required for copper-clad laminates, and reduced testing for PCBs through the MCIL/CCIL programme. No file review was required for laminate or PCB, no testing was needed to convert FR-4.0 or FR-4.1 recognized laminates that have been previously evaluated for FR-15 relative thermal indices, and minimal testing was needed to upgrade existing PCBs using a material converted from FR-4 to FR-15.
There followed an open session on issues facing the PCB materials supply chain, with Isola’s Karl Stollenwerk and Ventec’s Thomas Michels and moderated by Alun Morgan, a sequel to the discussion held at the EIPC winter conference in Salzburg. It was generally agreed that, although the copper foil shortage was presently not as critical, and a seasonal drop in demand in Asia had allowed laminators to replenish their stocks somewhat, the crisis was not over and the pressure would probably return within the following few weeks. And although base copper prices were declining on the London Metal Exchange, conversion costs were rising and further foil price increases were expected. No immediate shortage was seen in glass fabric, but price rises were anticipated. Thomas Michels repeated his earlier advice to PCB manufacturers to resist the temptation to panic-buy, and to work closely in partnership with their suppliers to plan their future requirements.
A full and technically intensive first day concluded with a visit to the nearby National Motorcycle Museum, followed by a convivial conference dinner, generously sponsored by Ventec.
Editor's Note: To read "Global Impact on European PCB Fabrication: EIPC Summer Conference 2017, Day 2", click here.