Mentor Graphics Debuts Xpedition Package Integrator Flow


Reading time ( words)

Mentor Graphics Corporation has announced its new Xpedition® Package Integrator flow, the industry's broadest solution for IC, package, and PCB co-design and optimization. The Package Integrator solution automates planning, assembly and optimization of today's complex multi-die packages. It incorporates a unique virtual die model concept for true IC-to-package co-optimization. In support of early marketing-level studies for a proposed new device, users can now plan, assemble and optimize complex systems with minimal source data. The new Package Integrator flow allows design teams to realize faster and more efficient physical path finding and seamless tool integration for rapid prototyping, right to the production flow.

This solution ensures that ICs, packages and PCBs are optimized with each other to reduce package substrate and PCB costs by efficient layer reduction, optimized interconnect paths, and streamlined/automated control of the design process. The Xpedition Package Integrator product also provides the industry's first formal flow for ball grid array (BGA) ball-map planning and optimization based on an "intelligent pin" concept, defined by user rules. In addition, a groundbreaking multi-mode connectivity management system (incorporating hardware description language (HDL), spreadsheet and graphical schematic) provides cross-domain pin-mapping and system level cross-domain logical verification.

"Companies are recognizing that it will not be possible to design optimal systems in a timely fashion without the ability to co-design the IC, package, and board," said E. Jan Vardaman, president and founder, TechSearch International, Inc. "Incorporating key parameters from thermal and electromagnetic modeling will be critical in meeting performance objectives.  Automating this process is essential to meet development and product launch schedules in our fast moving market segments. Mentor's Xpedition Package Integrator tool is a breakthrough in the design process."

Additional features include:

  • Cross-domain interconnect visualization in a single view
  • Powerful, comprehensive and user-friendly multi-mode physical layout tools with industry leading routing for PCB, MCM, SiP, RF, Hybrid and BGA designs
  • Fully automated library development

The Xpedition Package Integrator flow leverages other Mentor Graphics tools such as the HyperLynx® signal and power integrity product, FloTHERM® computational fluid dynamics (CFD) thermal modeling tools, and the Valor® NPI substrate fabrication checking tool. To complete the Mentor Graphics co-design solution, Nimbic was acquired in 2014. The Nimbic technology provides Maxwell-accurate, 3D full-wave electromagnetic (EM) high-performance simulation solutions that accurately calculate complex electromagnetic fields for chip-package-board simulation.

"The Xpedition Package Integrator design flow, especially the unique virtual die model, gives package and board design experts really meaningful guidance and tools for their parts of the system design efforts," said Herb Reiter, president of eda2asic and Director of 3D-IC Programs at Si2. "This flow also allows quick and structured feedback to the IC designers and enables true die-package-board co-design and optimization towards best possible performance versus power ratios for your next system design."

"Mentor Graphics recognizes the increasing complexity in electrical systems design and manufacturing, particularly for IC, package and board co-design," stated A.J. Incorvaia, vice president and general manager of Mentor Graphics Systems Design Division. "Our new Xpedition Package Integrator flow will enable systems designers to achieve optimum productivity by saving time and costs while improving the overall quality and performance of advanced systems."

Product Availability

The Xpedition Package Integrator flow is available now.  For pricing, consult a Mentor Graphics sales representative or call 1-800-547-3000. Additional product information can be found on the website.

About Mentor Graphics

Mentor Graphics Corporation (NASDAQ: MENT) is a world leader in electronic hardware and software design solutions, providing products, consulting services and award-winning support for the world's most successful electronic, semiconductor and systems companies. Established in 1981, the company reported revenues in excess of $1.24 billion. Corporate headquarters are located at 8005 S.W. Boeckman Road, Wilsonville, Oregon 97070-7777. World Wide Web site: http://www.mentor.com/.

Share


Suggested Items

3D Convergence of Multiboard PCB and IC Packaging Design

07/18/2018 | Bob Potock, Zuken
A new generation of 3D multiboard product-level design tools offer major improvements by managing multiboard placement in both 2D and 3D, and enabling co-design of the chip, package and board in a single environment. Multiboard design makes it possible to create and validate a design with any combination of system-on-chips (SOCs), packages, and PCBs as a complete system. Chip-package-board co-design enables designers to optimize routability via pin assignment and I/O placement to minimize layer counts between the package, chip and board. The new design methodology makes it possible to deliver more functional, higher performing and less expensive products to market in less time.

Dave Wiens Discusses Multi-board Design Techniques

07/09/2018 | Andy Shaughnessy, I-Connect007
For our multi-board design issue, I interviewed Dave Wiens, product marketing manager for Mentor, a Siemens business. We discussed how the multi-board design technique differs from laying out single boards, along with the planning, simulation and analysis processes required to design multi-board systems.

Paving the Way for 400Gb Ethernet and 5G

06/26/2018 | Chang Fei Yee, Keysight Technologies
This article briefly introduces the 4-level pulse amplitude modulation (PAM-4) and its application in 400 Gigabit Ethernet (400GbE), to support the booming data traffic volume in conjunction with the deployment of 5G mobile communications. Furthermore, this article also highlights the essential pre-layout effort from signal integrity perspective for physical (PHY) link design on a PCB, including material selection, transmission line design and channel simulation to support 56Gbps data rate that paves the way for seamless communication in 400GbE.




Copyright © 2018 I-Connect007. All rights reserved.