Zulki’s PCB Nuggets: What’s Different Between C2 and C4 for PCB Microelectronics Assembly?


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In my last column, I talked about flip-chip ball grid array (BGA), or FCBGA, making its grand entrance into PCB microelectronics assembly. But that subject requires a lot more digging to get the full story for OEMs planning highly advanced products that demand PCB microelectronics assembly.

In that regard, C4 and C2 bumps for flip-chip assemblies are among the top techniques that require close attention. Those two are flip-chip (FC) bump connection techniques and are crucial for efficient and cost-effective microelectronics assembly. In short, C4 and C2 are interposers that connect a small die in an FCBGA, using flip-chip on one side and BGA on the other side. This connection technique significantly reduces a board or substrate real estate by making the same amount of connections in a traditional BGA using these FCBGA connections.

In the C4 technique (Figure 1), solder bumps are deposited on chip pads situated on the top side of a silicon wafer during the final wafer processing step. A chip or die is then mounted to external circuitry through a substrate, which can be another organic material circuit board. It is then flipped over. The top part faces down and is aligned to matching pads on that substrate. Then, solder is reflowed to complete the interconnecting process, and the circuitry is joined together.

zulki_fig1.jpg

C4 is different than wire bonding where a chip is sitting face up. In this case, die pads are connected to the pads of an interconnect circuit, like a substrate, BGA, or glass or ceramic. This connects to outside circuitry, using gold, aluminum, or copper wires.

C4 is an abbreviation for the controlled collapse of chip connection and has long been associated with the BGA packaging process. The “collapse” part of C4 happens when the BGA balls undergo IR reflow. When the C4 balls collapse, they melt and solder into the circuit board pads to make the assembly connections, completing the joint formation.

The controlled portion of the collapse comes from the fact that it is controlled by the type of ball and reflow thermal profile being performed during the BGA connection or C4 connection. It’s also important to emphasize that C4 is well-proven, has been a commodity known technology for decades, has been perfected, and isn’t very costly, unless fine pitch is involved.

That’s where C2 comes in. A relatively new technology, C2 stands for chip connections and is also known as copper pillars assemblies. It differs from C4 in that C4 has a controlled collapse of balls or chip connections. However, C2 doesn’t have that. There’s no ball collapse like in C4 because copper pillars cannot be melted like the solder on a BGA ball.

C2 is typically used for finer-pitch devices when the BGA pad has a pitch of 180 µm or less, which is about seven mils or less pitch pad of a BGA. If the BGA ball pad pitch is 200 µm or eight mils or higher, then C4 is used. In short, C4 effectively deals with a 200 µm or greater pad pitch. However, 150- or 180-µm pitch devices cannot typically be assembled properly on an organic substrate using a C4 technology; instead, they must use C2.

Advantages and Disadvantages

Aside from these differences, C2 and C4 have advantages and disadvantages. I already said C4 is well-established and relatively inexpensive. Moreover, when BGA balls are melted using the C4 process, they realign to the BGA pads on PCB (substrate) surface to create perfect solder joints. On the other hand, with C2 and no collapse, the PCB microelectronics assembly house must be highly experienced at precise placement tolerance. That’s critical so that C2 copper pillars align perfectly with pads on a substrate’s surface pads for optimal assemblies.

Also, the use of thermal compression adds expense to C2 assembly because you need a specialized tool for this added step. But that methodology isn’t required for C4 assembly. However, C2 has a distinct advantage: copper pillars. Since they are a certain length and copper, they act as an extremely efficient heat conductor, providing excellent heat sinking. If you have a chip that’s creating a lot of power and heat and you’re using C2 copper pillars, the device can radiate the heat through these Cu pillars. This makes the chip cooler more quickly compared to C4. C4 doesn’t have this luxury of heat sinking or heat dissipation.

C2 and C4 bumps can be used either on organic or inorganic substrates. Organic substrates are based on FR-4, Rogers, or polyimide inorganic substrates are alumina (AI203), aluminum nitride (AIN), and gallium arsenide (GaAs).

Organic substrates like an FR-4, Rogers, or polyimide have significant challenges when it comes to creating trace widths and trace or air gaps in between BGA pads when it reaches below three mils for 75 µm. Based on the available technology right now, some high-end PCB fabrication shops can create three-mil traces and three-mil air gaps. But in some cases, they can also do two-mil lines or traces and two-mil air gaps. But that’s the absolute limit when it comes to organic substrates using C2 or C4 interposers.

However, with inorganic substrates like alumina, these limitations are eliminated. Trace spaces and air gaps can be in microns rather than mils. If you have an organic substrate, you can design a board with one micron of line and one micron of space, which is sub-mil. For example, 0.4-mil traces and 0.4-mil gaps can easily be designed and fabricated using an inorganic substrate.

But the cost of an inorganic substrate is the main problem. Fabrication is approximately 10 times more expensive compared to organic substrates like FR-4, Rogers, or polyimide material. Most OEMs are trying to switch to the organic substrate because of the cost reduction that is involved in the whole process.

Considering the various C4 and C2 aspects and differences, it’s always best for OEMs to first collaborate with their PCB microelectronics assembly houses to get a solid foundation of the pros and cons before launching into an advanced product.

Zulki Khan is the president and founder of NexLogic Technologies Inc.

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